Home Page of
François VERDIER
Campus
SophiaTech, 930 route des Colles
06903 Sophia Antipolis,
France
Email:
francois.verdier at univ-cotedazur.fr
Tel: (+33)4 89 15 44 45
I'm Professor at the Electronics Department of the University Cote d'Azur (UCA) and deputy director of the LEAT CNRS UMR 7248 laboratory. I'm an IEEE member.
I'm interested in all aspects of digital architectures design for embedded systems and IoT with applications in digital signal processing, real-time image processing, software defined radio applications and wireless communication. I'm particularly interested in (dynamically) reconfigurable architectures and the RTOS modeling and simulation.
Design of Blockchains and Smart Contracts applications on IoT Devices
Smart IoT for Mobility ANR project (a multi-disciplinary project in collaboration with I3S, Gredeg, Renault and Symag)
Design of Power-Aware SoCs
Experiences of using PwrClkARCH at NXP
Design of LDPC-based error correction decoders in wireless communication
Binary LDPC decoders for DVB-S2 applications (collaboration with ST microElectronics)
Architetural issues of non-binary (GF(q)) LDPC decoders (collaboration with ST microElectronics)
High-level modeling and validation of Real-Time Operating Systems (RTOS) in SoC design flows
Development of high-level SystemC RTOS models for hardware/software SoC architecture exploration.
Distributed and heterogeneous RTOS SystemC models for flexible SoC architectures (collaboration with Thales-Research Technologies)
Design methodologies for using highly integrated reconfigurable systems (RSoC) in Software Defined Radio platforms
The early validation of software stacks of wireless communication by using high level SystemC models (collaboration with EDF R&D)
Current PhD students :
Adrien RUSSO
Roland KROMES
Antonio GENOV
Cyril SAMUEL NAVES
Luc GERRITS
PhD graduates students :
Arthur SEGARD (in 01/2007)
Adrian VOICILA (in 09/2007)
Grégory GAILLIARD (in 02/2010)
Guy WASSI (in 09/2011)
Emmanuel HUCK (in 11/2011)
Imen BAHRI (in 11/2011)
Thomas LEFEBVRE (in 09/2012)
Laurent GANTEL (in 01/2014)
Amel KHIAR (in 10/2014)
Emilien KOFMAN (in 02/2017)
Calypso BARNES (in 06/2017)
Amal BEN AMEUR (in 06/2019)
TEACHING
I teach the following courses :
The computer architecture course (SPUE42) in the second year of the license
The microprocessor course (SLEEL602) in the third year of the license
The connected embedded system course (SLEEL604) in the third year of the license
The RTOS course (SMUES302) in the second year of master
The SystemC course (SMUES306) in the second year of master
BIBLIOGRAPHY (short list)
Books chapters
B. Miramond, E. Huck, T. Lefebvre and F. Verdier. Algorithm-Architecture Matching for Signal and Image Processing, chapter SystemC Multiprocessor RTOS model for services distribution on RTOS platforms. Springer Editor, pages 1—19, 2010
Patents
A. Voicila, D. Declercq, M. Fossorier, F. Verdier and P. Urard. Procédé et dispositif d’encodage de symboles avec un code du type à contrôle de parité et procédé et dispositif correspondants de décodage. Brevet numéro 07-2056FR, Septembre 2007.
A. Voicila, D. Declercq, M. Fossorier, F. Verdier and P. Urard. Method and device for encoding symbols with a code of a parity check type and corresponding decoding method and device. Brevet déposé aux usa, Février 2010.
Journal Articles
Hend Affes, Michel Auguin, François Verdier. Techniques de gestion de puissance dans les systèmes sur puce, Techniques de l'Ingenieur, 2016, hal-01322321
F. Verdier and D. Declercq. A Low Cost Parallel Scalable FPGA Architecture for Regular and Irregular LDPC Decoding. IEEE Transactions on Communications, 54(7) :1215–1223, July 2006.
F. Verdier, B. Miramond, M. Maillard, E. Huck, and Th. Lefebvre. Using High-Level RTOS Models for HW/SW Embedded Architecture Exploration : Case Study on Mobile Robotic Vision. EURASIP Journal on Embedded Systems, 2008, 2008. Special issue on Design and Architectures for Signal Image Processing.
F. Ghaffari, B. Miramond, and F. Verdier. Run-Time HW/SW Scheduling of Data Flow Applications on Reconfigurable Architectures. EURASIP Journal on Embedded Systems, 2009, 2009.
B. Miramond, E. Huck, F. Verdier, A. Benkhelifa, B. Granado, M. Aichouch, JC. Prévotet, D. Chillet, S. Pillement, T. Lefebvre, and Y. Olivia. OveRSoC : a Framework for the Exploration of RTOS for RSoC Platforms. Hindawi International Journal on Reconfigrable Computing, 2010.
A. Voicila, D. Declercq, F. Verdier, M. Fossorier, and P. Urard. Low complexity decoding for non-binary LDPC codes in high order fields. IEEE Transactions on Communications, 58(5), 2010.
Proceedings Articles
C. Naves Samuel, S. Glock, F. Verdier, P. Guitton-Ouhamou. Choice of Ethereum Clients for Private Blockchain: Assessment form Proof of Authority Perspective, IEEE International Conference on Blockchain and Cryptocurrency (ICBC 2021), Australia
Amal Ben Ameur, Antonio Genov, François Verdier, Loic Leconte. Timing-Aware high level power estimation of industrial interconnect module, Design and Verification Conference and Exhibition" (DVCON), 27/10/2020, conférence virtuelle, FR, hal-02951763
Antonio Genov, Loic Leconte, François Verdier. Mixed Electronic System Level Power/Performance Estimation using SystemC/TLM2.0 Modeling and PwClkARCH Library, Design and Verification Conference and Exhibition (DVCON), 27/10/2020, conférence en virtuelle, FR, hal-02950521
Pierre-Emmanuel Novac, Adrien Russo, Benoit Miramond, Alain Pegatoquet, François Verdier, Andrea Castagnetti. Toward unsupervised Human Activity Recognition on Microcontroller Units, conférence Euromicro DSD 2020, 26/08/2020, Portorož, SI, pp.9, hal-02894539
C. Naves Samuel, S. Glock, D. Bercovitz, F. Verdier, P. Guitton-Ouhamou. Automotive Data Certification Problem: a View on Effective Blockchain Architectural Solutions, 11th Annual IEEE Information Technology, Electronics and Mobile Communication Conference (IEMCON 2020), Vancouver, CA
L. Gerrits, R. Kromes, F. Verdier. A true Decentralized Implementation Based on IoT and Blockchain: a Vehicle Accident Use Case, IEE International Conference on Omni-Layer Intelligent Systems (COINS 2020), Barcelone, Spain
R. Kromes, L. Gerrits, F. Verdier. Adaptation of an Embedded Architecture to Run Hyperledger Sawtooth Application, IEEE IEMCON 2019, Vancouver, Canada
R. Kromes, F. Verdier. IoT Devices Hardware Modeling for Executiong Blockchain and Smart Contracts Applications, IEEE AICCSA 2019, Abu Dhabi, UE
Roland Kromes, Adrien Russo, Benoit Miramond, François Verdier. Energy consumption minimization on LoRaWAN sensor network by using an Artificial Neural Network based application, Sensors Applications Symposium 2019, 11/03/2019, Sophia-Antipolis, FR, hal-02013645
F. Verdier, P. De Filippi, F. Mallet, P. Collet, L. Arena, A. Attour, M. Ballatore, M. Chessa, A. Festré, P. Guitton-Ouhamou, R. Bernhard, B. Miramond. Smart IoT for Mobility: Automating of Mobility Value Chain through the Adoption of Smart Contracts within IoT Platforms , 17th Driving Simulation & Virtual Reality Conference (DSC 2018), Antibes, France
A. Ben Ameur, H. Affes, M. Auguin, F. Verdier and X. Buisson. Clock Management and Analysis for Transaction-Level Virtual Prototypes. The 2015 Forum on specification and Design Languages, Barcelona, Spain, September 2015.
H. Affes, M. Auguin, F. Verdier and A. Pégatoquet. A Methodology for Inserting Clock-Management Strategies in Transaction-Level Models of System-on-Chips. The 2015 Forum on specification and Design Languages, Barcelona, Spain, September 2015.
E. Vaumorin, G. Avot, H. Affes, M. Auguin, A. Pegatoquet, F. Verdier. Extending IP-XACT and UPF to support ESL to RTL low power design methodology. In proceedings of the Design and Automation Conference (DAC'2015), San Francisco, CA, 2015.
S. Moataz, F. Verdier and C. Belleudy. Power Estimation Method Based on Real Measurements for Processor-based Designs on FPGA. In International Conference on Computational Science and Computational Intelligence (CSCI'14), Las Vegas, CA, USA, March 2014.
G. Wassi, Mohamed El Amine Benkhelifa, Geoff Lawday, F. Verdier and Samuel Garcia. Multi-shape Tasks Scheduling for Online Multitasking on FPGAs. In International Symposium on Reconfigurable Communication-centric Systems_on-Chip (ReCoSoC'2014), Montpellier, France. May 2014.
Laurent Gantel, Mohamed El Amine Benkhelifa, F. Verdier and Fabrice Lemonnier. MRAPI Resource Management Layer on Reconfigurable Systems-on-Chip. In International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'2014), Montpellier, France. May 2014.
Nicolas Serna and François Verdier. Very Fast co-simulation model and accurate on-the-fly performance estimation methodology for heterogeneous MPSoC. In the 27th IEEE International System-On-Chip Conference (SOCC). Las Vegas, Nevada, USA. September 2014.
C. Barnes, J.M. Cottin, F. Verdier and A. Pegatoquet. Modeling a node's system-on-chip for a more reliable simulation of wireless sensor networks. In the Sensors Energy harvesting wireless Network & Smart Objects conference (SENSO). Aix-en-Provence, France. October 2014.
N. Serna and F. Verdier. High-level model of sensor architecture for hardware and software design space exploration. In 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, United Kingdom, July, 2012
L. Gantel, M.E.A. Benkhelifa, F. Lemonnier and F. Verdier. Module Relocation in Heterogeneous Reconfigurable Systems-on-Chip using the Xilinx Isolation Design Flow. In International conference on ReConFigurables Computing and FPGAs (ReConFig), Cancun, Mexico, December 2012.
L. Gantel, S. Layouni, M. Benkhelifa, F. Verdier, and S. Chauvet. Multiprocessor Task Migration Implementation in a Reconfigurable Platform. In International conference on ReConFigurables Computing and FPGAs (ReConFig). IEEE Computer Society, december 2009.
J.-C. Prévotet, M. Benkhelifa, B. Granado, E. Huck, B. Miramond, F. Verdier, D. Chillet, and S. Pillement. A Framework for the Exploration of RTOS Dedicated to the Management of Hardware Reconfigurable Resources. In International conference on ReConFigurables Computing and FPGAs (ReConFig), Cancun, Mexico, december 2008.